NXP Semiconductors /MIMXRT1062 /CAN3 /CS2

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Interpret as CS2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TIME_STAMP0DLC0 (RTR)RTR 0 (IDE)IDE 0 (SRR)SRR 0CODE0 (ESI)ESI 0 (BRS)BRS 0 (EDL)EDL

Description

Message Buffer 2 CS Register

Fields

TIME_STAMP

Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.

DLC

Length of the data to be stored/transmitted.

RTR

Remote Transmission Request. One/zero for remote/data frame.

IDE

ID Extended. One/zero for extended/standard format frame.

SRR

Substitute Remote Request. Contains a fixed recessive bit.

CODE

Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process.

ESI

Error State Indicator. This bit indicates if the transmitting node is error active or error passive.

BRS

Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame.

EDL

Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010.

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